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Fix unsafe cast in linegen.py w/ await yield handling (#3533)
[etc/vim.git] / tests / data / preview / prefer_rhs_split.py
index 5b89113e61839f8bfd4d12861f60b97223e82f62..2f3cf33db41c306a559a7017e58b9a93041bec3a 100644 (file)
@@ -50,7 +50,7 @@ first_item, second_item = some_looooooooong_module.some_loooooog_function_name(
     forth_item,
     fifth_item,
     last_item_very_loooooong,
     forth_item,
     fifth_item,
     last_item_very_loooooong,
-) = everyting = some_loooooog_function_name(
+) = everything = some_looooong_function_name(
     first_argument, second_argument, third_argument
 )
 
     first_argument, second_argument, third_argument
 )